W664GG6RB-06
Memory
Technical Specifications
| Type | Description |
|---|---|
| Maximum Clock Speed | 1.6 GHz |
| Refresh Current | 2mA |
| Memory Size | 4Gbit |
| Memory Format | DDR4 SDRAM |
| Type | Description |
|---|---|
| Operating Temp | 0°C ~ +95°C |
| Features | Auto self-refresh;Built-in temperature sensor;Auto precharge function;Asynchronous reset function;Data mask function;Write leveling function;Dynamic on-chip termination;ZQ calibration function;CRC function |
| Working Voltage V | 1.2 V |
| Package / Case | VFBGA-96 |
Product Introduction
This product is a DDR4 SDRAM memory device in x16 configuration with a 96-ball VFBGA package. It supports high-speed data transfer and incorporates a wide range of advanced features to optimize system performance and reliability. The device includes a simplified state machine, fundamental read/write operation capabilities, and defines detailed reset and initialization procedures. Its operating modes are configurable via mode registers. Core features include burst length and order control, DLL enable/disable sequences, input clock frequency change adaptation, write leveling adjustment, and multiple temperature-controlled refresh modes. Additionally, it supports fine granularity refresh, multipurpose registers for DQ training, data mask, data bus inversion, ZQ calibration, DQ reference voltage training, per-DRAM addressability, command/address latency mode, CRC, command/address parity, gear-down mode, and programmable preamble and postamble. The device adheres to standard timing definitions for activate, precharge, and read operations.
Features
- Compliant with DDR4 SDRAM standard
- x16 data width, 96-ball VFBGA package
- Programmable burst length and burst order
- Integrated DLL with switchable modes for different operating conditions
- Input clock frequency variation support
- Write leveling for signal integrity optimization
- Multiple temperature-controlled refresh modes: normal temperature mode (-40℃ ≤ TCASE ≤ 85℃) and extended temperature mode (85℃ ≤ TCASE ≤ 105℃)
- Fine granularity refresh mode with adjustable refresh rate
- Multi-purpose registers for DQ training
- Data mask and data bus inversion (DBI) support
- ZQ calibration command for output drive and termination resistance optimization
- DQ reference voltage training
- Per-DRAM addressability
- Command address latency mode
- Integrated CRC for data integrity checking
- Command address parity with error log readback
- Gear-down mode
- Programmable write and read preamble
- Programmable write and read postamble
- Standard activate, precharge, and read operation timing compliance
Datasheet
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
Sourcing Information
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