TLC555CDR

The TLC555 is a monolithic timing circuit fabricated using TI LinCMOS™ technology. This timer is fully compatible with CMOS, TTL, and MOS logic devices and operates at frequencies up to 2MHz. Due to its high input impedance, this device supports smaller timing capacitors than those used with the NE555 or LM555. As a result, more accurate time delays and oscillations can be achieved. Low power consumption is maintained across the entire supply voltage range.

Like the NE555, the TLC555 has a trigger level of approximately one-third of the supply voltage and a threshold level of approximately two-thirds of the supply voltage. These levels can be modified using the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output goes low. The reset input (RESET) takes priority over all other inputs and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output goes low. Whenever the output is low, a low-impedance path is provided between the discharge terminal (DISCH) and ground (GND). All unused inputs must be tied to an appropriate logic level to prevent false triggering.