SN74LVC125APWR
Buffers, Drivers, Receivers, Transceivers
Technical Specifications
| Type | Description |
|---|---|
| Working Voltage V | 2.625 V |
| Number of Elements | 4 |
| Iq A | 4e-05 |
| Input type | - |
| Current - Output High(IOH) | 24mA |
| Current - Output Low(IOL) | 24mA |
| Number of Bits per Element | 1 |
| Type | Description |
|---|---|
| Channel Type | Unidirectional |
| Output Type | Tri-State |
| Operating Temp | -40°C ~ +125°C |
| Features | Output enable;Level shifting |
| Tpd Ns | 2.5 |
| Package / Case | TSSOP-14 |
Product Introduction
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC125A features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
Features
- Operates From 1.65 V to 3.6 V
- Specified From -40℃ to 85℃ and -40℃ to 125℃
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4.8 ns at 3.3 V
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25℃
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25℃
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Applications
- - Bus buffer driving - Level shifting for mixed-voltage systems
Datasheet
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Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Sourcing Information
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