N32G435RBL7

Technical Specifications

Product Introduction

Features

• Core CPU: 32-bit ARM Cortex-M4 + FPU, supporting single-cycle hardware multiply/divide, DSP instructions, and MPU; 2KB instruction cache with flash accelerator for zero-wait-state execution; up to 108MHz, 135DMIPS performance.
• Encrypted Memory: Up to 128KB on-chip flash with encrypted storage, multi-user partition management, data protection, and hardware ECC; 100K erase/write cycles, 10-year data retention; 32KB SRAM comprising 24KB SRAM1 (configurable retention in STOP2 mode) and 8KB SRAM2 (configurable retention in STANDBY and STOP2 modes), with hardware parity check.
• Low-Power Management: STANDBY mode 2.5μA — all backup registers retained, I/O retained, optional RTC, 8KB SRAM2 configurable retention, fast wake-up; STOP2 mode 6μA — RTC supported, 8KB SRAM2 and 24KB SRAM1 configurable retention, CPU registers retained, I/O retained, fast wake-up; RUN mode 90μA/MHz @108MHz; LPRUN mode: PLL off, MSI as system clock, MR off, LPR on, USB/CAN/SAC power off, other peripherals optional.
• High-Performance Analog Interface: One 12-bit 5Msps ADC, multi-precision configurable, up to 9Msps in 6-bit mode, up to 16 external single-ended input channels with differential mode support; 2 rail-to-rail op-amps with built-in up to 32× programmable gain amplifier; 2 high-speed analog comparators with 64-level adjustable reference, COMP1 operable in STOP2 mode; one 12-bit 1Msps DAC; internal 2.048V independent voltage reference; integrated low-voltage detection unit.
• Clocks: HSE: 4MHz ~ 32MHz external high-speed crystal; LSE: 32.768kHz external low-speed crystal; HSI: internal 16MHz high-speed RC; MSI: internal multi-speed RC 100kHz ~ 4MHz; LSI: internal 40kHz low-speed RC; built-in high-speed PLL; MCO: one clock output, configurable as low-speed or high-speed.
• Reset: Power-on / under-voltage / external pin reset; watchdog reset.
• Up to 52 GPIOs.
• Communication Interfaces: 5× U(S)ART — 3× USART (ISO7816, IrDA, LIN support), 2× UART; 1× LPUART with STOP2 wake-up; 2× SPI up to 27Mbps with I2S support; 2× I2C up to 1MHz, master/slave configurable, dual-address response in slave mode; 1× USB 2.0 full-speed device; 1× CAN 2.0A/B.
• 1× DMA controller, 8 channels, fully configurable source and destination addresses.
• 1× RTC with leap-year perpetual calendar, alarm events, periodic wake-up, and internal/external clock calibration.
• Timers/Counters: 2× 16-bit advanced timers — input capture, complementary output, quadrature encoder input, up to 9.25ns control resolution, 4 independent channels each (3 channels supporting 6 complementary PWM outputs); 5× 16-bit general-purpose timers — 4 independent channels each, input capture/output compare/PWM; 2× 16-bit basic timers; 1× 16-bit low-power timer with dual-pulse counting, operable in STOP2 mode; 1× 24-bit SysTick; 1× 7-bit WWDG; 1× 12-bit IWDG.
• Programming: SWD/JTAG debug interface; UART and USB Bootloader.
• Security Features: Built-in hardware cryptographic acceleration engine; AES, DES, TDES, SHA1/224/256, SM1, SM3, SM4, and SM7 algorithms; flash encryption, multi-user partition management unit (MMU); TRNG.
• CRC16/32; write protection (WRP); multi-level read protection (RDP) L0/L1/L2; secure boot, encrypted program download, secure update; external clock failure detection, tamper detection.
• 96-bit UID and 128-bit UCID.
• Operating Conditions: Supply voltage: 1.8V ~ 3.6V; operating temperature: -40℃ ~ 105℃; ESD: ±4kV (HBM), ±1kV (CDM).
• Packages: QFN28 (4mm×4mm); LQFP32 (7mm×7mm); LQFP48 (7mm×7mm); LQFP64 (10mm×10mm); LQFP64 (7mm×7mm).

Datasheet

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