MCP23S18T-E/SO
I/O Expanders
Technical Specifications
| Type | Description |
|---|---|
| Working Voltage V | 3.65 V |
| Interface | SPI |
| Number of I/O | 16 |
| Iq A | 1e-06 |
| Interrupt Output | Interrupt Output |
| Number of Supporting Devices | - |
| Type | Description |
|---|---|
| Current - Output High(IOH) | - |
| Operating Temp | -40°C ~ +125°C |
| Output Type | Open-drain |
| Features | Reset function;Cascade and address expansion |
| Package / Case | SOIC-28-300mil |
Product Introduction
The MCP23X18 device provides 16-bit, general purpose parallel I/O expansion for I²C bus or SPI applications. The two devices differ only in the serial interface.
The MCP23X18 consists of multiple 8-bit configuration registers for input, output and polarity selection. The system master can enable the I/Os as either inputs or outputs by writing the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the input port register can be inverted with the polarity inversion register. All registers can be read by the system master.
The 16-bit I/O port functionally consists of two (2) 8-bit ports (PORTA and PORTB). The MCP23X18 can be configured to operate in 8-bit mode or 16-bit mode via IOCON.BANK.
There are two interrupt pins, INTA and INTB which can be associated with their respective ports, or can be logically OR'ed together so both pins will activate if either port causes an interrupt.
The interrupt output can be configured to activate under two conditions (mutually exclusive):
1. When any input state differs from its corresponding input port register state. This is used to indicate to the system master that an input state has changed.
2. When an input state differs from a preconfigured register value (DEFVAL register).
The Interrupt Capture register captures port values at the time of the interrupt, thereby saving the condition that caused the interrupt.
The Power-on Reset (POR) sets the registers to their default values and initializes the device state machine.
The hardware address pin is used to determine the device address.
Features
- 16-bit remote bidirectional I/O port: I/O pins default to input
- Open-drain outputs: -5.5V tolerant, 25 mA sink capable (per pin), 400 mA total
- High-speed I²C interface: (MCP23018) 100 kHz, 400 kHz, 3.4MHz
- High-speed SPI interface: (MCP23S18) 10 MHz: 2.7V ≤ VDD ≤ 5.5V
- Single hardware address pin: (MCP23018) Voltage input to allow up to eight devices on the bus
- Configurable interrupt output pins: Configurable as active-high, active-low or open-drain
- Configurable interrupt source: Interrupt-on-change from configured defaults or pin change
- Polarity inversion register to configure the polarity of the input port data
- External reset input
- Low standby current: 1 μA (-40°C ≤ TA ≤ +85°C), 6 μA (+85°C ≤ TA ≤ +125°C)
- Operating voltage: 1.8V to 5.5V
Datasheet
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Sourcing Information
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