MC14049UBDR2G
Gates and Inverters
Technical Specifications
| Type | Description |
|---|---|
| Supply V | 10.5 V |
| Tpd Ns | 50.0 |
| Logic Family | 4000B |
| Input Logic Level - Low | 1V~2.5V |
| Input Logic Level - High | 4V~12.5V |
| Quiescent Current(Iq) | 4uA |
| Current - Output High(IOH) | 10mA |
| Type | Description |
|---|---|
| Current - Output Low(IOL) | 40mA |
| Features | - |
| Operating Temp | -55°C ~ +125°C |
| Input Type | - |
| Working Voltage V | 10.5 V |
| Channels | 6.0 |
| Package / Case | SOIC-16 |
Product Introduction
The MC14049UB hex inverter/buffer is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primary use where low power dissipation and/or high noise immunity is desired. This device provides logic−level conversion using only one supply voltage, VDD. The input−signal high level (VIH) can exceed the VDD supply voltage for logic−level conversions. Two TTL/DTL Loads can be driven when the device is used as CMOS−to−TTL/DTL converters (ΔVDD = 5.0 V, VOL ≤ 0.4 V, IOL ≥ 3.2 mA).
Features
- High Source and Sink Currents
- High−to−Low Level Converter
- Supply Voltage Range = 3.0 V to 18 V
- Meets JEDEC UB Specifications
- VIN can exceed VDD
- Improved ESD Protection on All Inputs
- These Devices are Pb−Free and are RoHS Compliant
- NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
Datasheet
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Sourcing Information
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