CLVC16244AIDGGRQ1
Logic ICs
Technical Specifications
| Type | Description |
|---|---|
| Quiescent Current | 20 µA |
| Input Type | - |
| Current - Output High(IOH) | 24mA |
| Current - Output Low(IOL) | 24mA |
| Number of Bits per Element | 4 |
| Channel Type | Unidirectional |
| Supply Voltage | 1.65V~3.6V |
| Type | Description |
|---|---|
| Output Type | Tri-State |
| Operating Temperature | -40°C~+85°C |
| Features | Power-off isolation;Output enable;Level shifting |
| Number of Elements | 4 |
| Tpd Ns | 4.1ns@3.3V,50pF |
| Package / Case | TSSOP-48-6.1mm |
Product Introduction
This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC16244A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Features
- Qualification in Accordance With AEC-Q100
- Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval Controlled Baseline – One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification
- Qualification Pedigree Member of the Texas Instruments Widebus™ Family
- Operates From 1.65 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4.1 ns at 3.3 V
- Typical VOLP (Output Ground Bounce) < 0.8 V at Vcc = 3.3V , TA = 25℃
- Typical VOHV (Output VOH Undershoot) > 2 V at Vcc = 3.3V , TA = 25℃
- Ioff Supports Partial-Power-Down Mode Operation
- Supports Mixed-Mode Signal Operation On All Ports (5-V Input/Output Voltage With 3.3-V Vcc)
- Latch-Up Performance Exceeds 100 mA Per JESD 17
- ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 1000-V Charged-Device Model (C101)
Applications
- Three-state memory address driving
- Clock driving
- Bus-oriented receive and transmit
- Mixed-voltage system level translation
Datasheet
Alternative Parts
Common CLVC16244AIDGGRQ1 alternatives overseas buyers search for:
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Sourcing Information
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