AT32F421F8P7

Technical Specifications

Features

• Up to 120 MHz operating frequency with MPU, single-cycle multiply and hardware divide, DSP instruction set
• 16 KB to 64 KB flash program/data memory
• 4 KB system memory for Bootloader use, one-time configurable as general user program and data area
• sLib: designates a specified main memory region as a secure execute-only code library — code in this area can be called but not read
• 8 KB to 16 KB SRAM
• 2.4 V to 3.6 V supply and I/O voltage
• POR/PDR
• PVD
• Low-power modes: Sleep, Stop, Standby; 4 WKUP pins to wake from Standby mode
• 5 × 32-bit backup registers
• 4 to 25 MHz crystal oscillator
• Built-in factory-trimmed 48 MHz RC oscillator (1% accuracy at 25℃, ±2% accuracy over -40℃ to +105℃)
• PLL with flexible configuration: 31× to 500× multiplication and 1 to 15 division factors
• Built-in calibrated 40 kHz RC oscillator
• Calibrated 32 kHz crystal oscillator
• All I/Os mappable to external interrupts
• Nearly all I/Os 5 V input tolerant
• All I/Os are fast I/Os with register access up to fAHB
• 5-channel DMA controller
• 1 × 12-bit 2 MSPS ADC with up to 15 external input channels
• 1 comparator with 5 external input channels and 1 internal reference voltage
• 1 × 16-bit 7-channel advanced timer with 6-channel PWM output, dead-time control and emergency stop
• Up to 5 × 16-bit timers, each with up to 4 channels for input capture/output compare/PWM or pulse counting, and incremental encoder input
• 1 × 16-bit basic timer
• ERTC: enhanced RTC with alarm, sub-second precision, and hardware calendar
• 2 × I2C interfaces (SMBus/PMBus support)
• 2 × USART interfaces; master synchronous SPI and modem control; ISO7816, LIN, and IrDA capability
• 2 × SPI interfaces (50 Mbit/s), both multiplexable as I2S interfaces with infrared transmitter

Datasheet

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• AT32F425F8P7 (request quote)

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