Nexperia

74LVC1G175GW,125

Logic ICs

Manufacturer
MPN
74LVC1G175GW,125
Package / Case
TSSOP-6
Key Attributes
Single D-type flip-flop with reset; positive-edge trigger

Technical Specifications

TypeDescription
Quiescent Current40 µA
Number of Bits per Element1
Synchronous/AsynchronousAsynchronous
Current - Output High(IOH)32mA
Current - Output Low(IOL)32mA
Setup Time1.1ns
Hold Time500ps
TypeDescription
Trigger TypeRising Edge
Supply Voltage1.65V~5.5V
Output TypePush-Pull
Operating Temperature-40°C~+125°C
Number of Elements1
Tpd Ns4ns@5V,50pF
Package / CaseTSSOP-6

Product Introduction

The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output.

The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

Features

  • Wide supply voltage range from 1.65 V to 5.5 V
  • High noise immunity
  • Overvoltage tolerant inputs to 5.5 V
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power dissipation
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 250 mA
  • Complies with JEDEC standard: JESD8 - 7 (1.65 V to 1.95 V), JESD8 - 5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS - 001 class 2 exceeds 2000 V, CDM: ANSI/ESDA/JEDEC JS - 002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

Datasheet

📄 Open Download

Alternative Parts

Common 74LVC1G175GW,125 alternatives overseas buyers search for:

Compliance & Export Codes

TypeDetails
RoHSROHS3
ECCNEAR99
CNHTS8542399000
USHTS8542390001
TARIC8542399000
TypeDetails
CAHTS8542390000
BRHTS85423999
INHTS85423900
MXHTS8542.39.99

Sourcing Information

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