MDD(Microdiode Semiconductor)

74HCT595D

Logic ICs

Manufacturer
MPN
74HCT595D
Package / Case
SOP-16L
Key Attributes
Function: Serial-to-Serial or Parallel
Voltage - Supply: 2.7V~5.5V
Propagation Delay: 30ns@4.5V,15pF
Output Current: 35mA

Technical Specifications

TypeDescription
FunctionSerial-to-Serial or Parallel
Operating Temperature-40°C~+125°C
Pd W0.5 W
Supply Voltage2.7V~5.5V
Output TypeTri-State
TypeDescription
Number of Elements-
Output Current35 mA
Tpd Ns30ns@4.5V,15pF
FeaturesAsynchronous clear function;Output enable
Package / CaseSOP-16L

Product Introduction

The 74HC595 and 74HCT595 are 8-bit serial-in/serial-out or parallel-out shift registers with storage registers and 3-state outputs. The shift register and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) for cascading, along with an asynchronous active-LOW reset input (MR̄). A LOW on MR̄ resets the shift register. Data is shifted on the LOW-to-HIGH transition of the SHCP input. Data in the shift register is transferred to the storage register on the LOW-to-HIGH transition of the STCP input. If the two clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. When the output enable input (OE̅) is LOW, data in the storage register appears at the outputs. A HIGH on OE̅ causes the outputs to assume a high-impedance OFF state. Operation of the OE̅ input does not affect the state of the registers. Inputs include clamping diodes, which allow input interfacing to voltages higher than VCC using current-limiting resistors.

Features

  • Wide operating voltage range: 2.7 V to 6.0 V
  • High noise immunity
  • CMOS low power consumption
  • 8-bit serial input
  • 8-bit serial or parallel output
  • Storage register with 3-state outputs
  • Shift register with direct clear
  • Latch performance exceeding 250 mA
  • JEDEC compliant: JESD8C (2.7 V to 3.6 V) and JESD7A (2.7 V to 6.0 V)
  • Input levels: CMOS for 74HC595, TTL for 74HCT595
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3500 V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
  • Multiple package options
  • Operating temperature range: -40 °C to +85 °C and -40 °C to +125 °C

Applications

  • Serial-to-parallel data conversion
  • Remote-controlled hold register

Datasheet

📄 Open Download

Compliance & Export Codes

TypeDetails
CNHTS8542399000
USHTS8542390001
TARIC8542399000
CAHTS8542390000
TypeDetails
BRHTS85423999
INHTS85423900
MXHTS8542.39.99

Sourcing Information

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