74HC595D,118
Shift Registers
Technical Specifications
| Type | Description |
|---|---|
| Output Type | Tri-State |
| Function | Serial-to-Serial or Parallel |
| Working Voltage V | 4 V |
| Operating temperature | -40°C ~ +125°C |
| Current - Output High(IOH) | 35mA |
| Type | Description |
|---|---|
| Current - Output Low(IOL) | 35mA |
| Number of Elements | 1.0 |
| Features | Asynchronous clear function;Output enable |
| Tpd Ns | 19.0 |
| Package / Case | SOIC-16 |
Product Introduction
The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Features
- Wide supply voltage range from 2.0 V to 6.0 V
- CMOS low power dissipation
- High noise immunity
- 8-bit serial input
- 8-bit serial or parallel output
- Storage register with 3-state outputs
- Shift register with direct clear
- 100 MHz (typical) shift out frequency
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- Complies with JEDEC standards:
- JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V)
- Input levels:
- For 74HC595: CMOS level
- For 74HCT595: TTL level
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 ℃ to +85 ℃ and from -40 ℃ to +125 ℃
Applications
- - Serial-to-parallel data conversion - Remote control holding register
Datasheet
Alternative Parts
Common 74HC595D,118 alternatives overseas buyers search for:
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Frequently Asked Questions
What supply voltage range, operating frequency, and output drive capability apply to this logic IC?
The 74HC595D belongs to Nexperia's 74HC high-speed CMOS logic family and operates over a supply voltage (VCC) range of 2.0 V to 6.0 V with CMOS input logic levels. According to the dynamic characteristics, the device supports a typical maximum operating frequency (fmax) of 91 MHz at VCC = 4.5 V and 108 MHz at VCC = 6.0 V. Table 7 also specifies minimum fmax values of 20 MHz at VCC = 4.5 V and 24 MHz at VCC = 6.0 V over the full −40°C to +125°C operating temperature range. The 3-state parallel outputs can source or sink up to ±6 mA at VCC = 4.5 V.
What physical package style, footprint dimensions, and terminal count specify the SOT109-1 package?
The 74HC595D is supplied in Nexperia's SOT109-1 (SO16) plastic small-outline package with 16 leads and a 3.9 mm body width. The package has a nominal 1.27 mm (50 mil) lead pitch, a body length of 9.8 mm to 10.0 mm, and a maximum package height of 1.75 mm, making it suitable for standard SO16 PCB footprints.
What ESD ratings and operating temperature range are specified for the 74HC595D?
The 74HC595D is specified for operation over an ambient temperature range of −40°C to +125°C. The device provides HBM ESD protection exceeding 2,000 V (ANSI/ESDA/JEDEC JS-001 Class 2) and CDM protection exceeding 1,000 V (ANSI/ESDA/JEDEC JS-002 Class C3). The datasheet also notes that the inputs include clamp diodes, enabling the use of current-limiting resistors when interfacing inputs to voltages above VCC.
Sourcing Information
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