74AVCH8T245PW:118
Translators, Level Shifters
Technical Specifications
| Type | Description |
|---|---|
| Working Voltage V | 2.2 V |
| Interface | - |
| Number of Elements | 1 |
| output type | Tri-State |
| Output Signal | - |
| Input Signal | - |
| Channel Type | Bidirectional |
| Type | Description |
|---|---|
| Number of Circuits | 8 |
| Current - Output High(IOH) | - |
| Current - Output Low(IOL) | - |
| Operating Temp | -40°C ~ +125°C |
| Data Rate | - |
| Features | Power-off protection;Output enable high-impedance |
| Package / Case | TSSOP-24 |
Product Introduction
The 74AVCH8T245 is an 8-bit, dual supply transceiver that enables bidirectional level translation. It features two 8-bit input-output ports (An and Bn), a direction control input (DIR), a output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated.
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn outputs are in the high-impedance OFF-state. The bus-hold circuitry on the powered-up side always stays active.
The 74AVCH8T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.
Features
- Wide supply voltage range:
- VCC(A): 0.8 V to 3.6 V
- VCC(B): 0.8 V to 3.6 V
- Maximum data rates:
- 380 Mbit/s (≥ 1.8 V to 3.3 V translation)
- 260 Mbit/s (≥ 1.1 V to 3.3 V translation)
- 260 Mbit/s (≥ 1.1 V to 2.5 V translation)
- 210 Mbit/s (≥ 1.1 V to 1.8 V translation)
- 150 Mbit/s (≥ 1.1 V to 1.5 V translation)
- 100 Mbit/s (≥ 1.1 V to 1.2 V translation)
- Suspend mode
- Bus hold on data inputs
- Latch-up performance exceeds 100 mA per JESD 78 Class II
- Inputs accept voltages up to 3.6 V
- IOFF circuitry provides partial Power-down mode operation
- Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V), JESD8-11 (0.9 V to 1.65 V), JESD8-7 (1.2 V to 1.95 V), JESD8-5 (1.8 V to 2.7 V), JESD8-B (2.7 V to 3.6 V)
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
Datasheet
Alternative Parts
Common 74AVCH8T245PW:118 alternatives overseas buyers search for:
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Sourcing Information
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